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Contact Us   2 months ago
R and D NAND Design Rule Engineer - boise, idaho

Req Id: 84425The NAND PI R and D group is responsible for developing state of the art high density NAND technologies. As an engineer within this organization you will be chartered with defining and maintaining physical design rules for current and future NVM technologies.Responsibilities include, but are not limited to::Define full design rule (DR) documents to support technology development from

Contact Us   2 months ago
NAND Read Window Budget RWB Product Engineer - boise, idaho

Req. ID: 84387 NAND Product Optimization Engineer DescriptionAs a NAND Product Optimization Engineer at Micron Technology, Inc., you will be responsible for optimizing the performance and reliability of our NAND products to meet the unique specifications and usage models for our customers, both internal and external. Responsibilities:Prior to first silicon of the NAND product, you will::run simula

Contact Us   2 months ago
R and D NAND Process Integration Engineer - boise, idaho

Req. ID: 86523As a NAND Process Integration Engineer you will take ownership of one or more process modules related to the development and operation of a semiconductor integrated circuit. This requires understanding of structural requirements, electrical performance, and process control mechanisms. Successful candidates must be proactive in identifying potential issues and addressing them early. P

Contact Us   3 months ago
R and D NAND Process Integration Engineer - boise, idaho

Req. ID: 86523As a NAND Process Integration Engineer you will take ownership of one or more process modules related to the development and operation of a semiconductor integrated circuit. This requires understanding of structural requirements, electrical performance, and process control mechanisms. Successful candidates must be proactive in identifying potential issues and addressing them early. P

Contact Us   3 months ago
R and D NAND Cell Wafer Level Reliability Engineer - boise, idaho

Req. ID: 86021As a NAND Engineer working with wafer level reliability, you will work on Micron's most advanced NAND technology. The responsibilities include coordinating testing and data analysis resources over the R and D lifecycle of the NAND technology node. You may also need to develop code to analyze data to debug issues, in particular reliability data and communicate the results in an e

Contact Us   4 months ago
R and D NAND Design Rule Engineer - boise, idaho

Req Id: 84425The NAND PI R and D group is responsible for developing state of the art high density NAND technologies. As an engineer within this organization you will be chartered with defining and maintaining physical design rules for current and future NVM technologies.Responsibilities include, but are not limited to::Define full design rule (DR) documents to support technology development from

Contact Us   4 months ago
R and D NAND Cell Wafer Level Reliability Engineer - boise, idaho

Req. ID: 86021As a NAND Engineer working with wafer level reliability, you will work on Micron's most advanced NAND technology. The responsibilities include coordinating testing and data analysis resources over the R and D lifecycle of the NAND technology node. You may also need to develop code to analyze data to debug issues, in particular reliability data and communicate the results in an e

Contact Us   4 months ago
Engineer NVE Managed NAND PE PERM - boise, idaho

Req Id: 82721Job Description: As a Non:Volatile Engineering Managed NAND Product Engineer (NVE NAND PE) at Micron Technology, Inc. you will be responsible for preparing for new memory products, defining, implementing, and optimizing test methodologies and conditions, and coordinating resources, testing, and analysis over the lifecycle of the product. You will work closely with Engineering, Manufac

Contact Us   5 months ago
NAND Product Optimization Engineer - boise, idaho

Req Id: 81362NAND Product Optimization Engineer DescriptionAs a NAND Product Optimization Engineer at Micron Technology, Inc., you will be responsible for optimizing the performance and reliability of our NAND products to meet the unique specifications and usage models for our customers, both internal and external. Responsibilities:Prior to first silicon of the NAND product, you will::run simulati

Contact Us   5 months ago
R and D NAND Cell Wafer Level Reliability Engineer - boise, idaho

As a NAND Engineer working with wafer level reliability, you will work on Micron's most advanced NAND technology. The responsibilities include coordinating testing and data analysis resources over the R and D lifecycle of the NAND technology node. You may also need to develop code to analyze data to debug issues, in particular reliability data and communicate the results in an effective way t

Contact Us   7 months ago
SENIOR ENGINEERNVE MANAGED NAND DESIGN Job - boise, idaho

Req Id: 71323As a Senior NVE Managed NAND Design Engineer at Micron Technology, Inc. you will be responsible for designing anddeveloping new mobile solid state storage products to support Micron's internal business units. You will be involved from product concept all the way through customer qualification. This will involve working within a cross:functional team composed of Marketing, ASIC, F

Contact Us   8 months ago
PQRA Senior NAND RMA Engineer PERM Job - boise, idaho

Req Id: 71842 As a PQRA (Product Quality Reliability Assurance) Senior NAND RMA (Returned Material Authorization) Engineer at Micron Technology, Inc., you will be responsible for performing Electrical Failure Analysis (EFA) of customer returned materials. You will then manage any necessary second level electrical and physical analysis in order to identify a defect. You will communicate results to

Contact Us   9 months ago
SENIOR ENGINEERNVE MANAGED NAND DESIGN Job - boise, idaho

Req Id: 71323As a Senior NVE Managed NAND Design Engineer at Micron Technology, Inc. you will be responsible for designing anddeveloping new mobile solid state storage products to support Micron's internal business units. You will be involved from product concept all the way through customer qualification. This will involve working within a cross:functional team composed of Marketing, ASIC, F

Contact Us   9 months ago
MLCTLC NAND Product Line Manager PERM Job - folsom, california

Req Id: 71149As a Multi:Level Cell (MLC)/Triple:Level Cell (TLC) NAND Product Line Manager at Micron Semiconductor Products, Inc. you will working at Microns Embedded Business Unit (EBU) managing one of the fastest growing memory products in the market today. This high impact individual will drive MLC/TLC NAND product management worldwide for the consumer, set top box, industrial and medical segme

Contact Us   9 months ago
Senior Staff NAND Design and Verification Engineer - Intel Folsom, CA

Develops preSilicon functional validation tests to verify the chip will meet design requirements. Works with reliability engineers to creates test plans for DFR validation, defining and running chip simulation models, and finding and implementing corrective measures for failing DFR tests. Analyzes and uses results to modify simulation methodologies.DFR design for reliability aging, safe operating

Contact Us   9 months ago
R and D Photolithography Process Development Engineer NAND Job - boise, idaho

As a Photolithography Engineer in Microns R and D/Technology Development group, you will be responsible for process module development for memory devices, in addition to other photolithography and process integration related activities. In this position, you will work with Micron engineers, technology partners and vendors to develop unit processes that meet device requirements for next:generation

Contact Us   1 year ago
NAND Test Engineer Job - boise, idaho

Req Id: 46342As a NAND Test Engineer at Micron, you will develop, debug, and maintain code that enables the massive parallel testing of advanced semiconductor devices. Micron Test Engineers support R and D, interacting closely with Product Engineering, as well as taking part in the designing and debugging of test hardware. In this position you will be expected to gain a firm understanding of the f


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Last Updated on: November 23, 2017
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